This Web page was created by reformatting portions of the LaTeX source file of the public domain documentation distributed with the SPIM simulator. This documentation is fairly consistent with the information in our online manual but it is not identical.
Chris Edmondson-Yurkanan (with thanks to John Conery at the University of
Oregon)
Last update: 29 Oct 98 16:18:29
In all instructions below, Src2 can either be a register or an immediate value (a 16 bit integer). The immediate forms of the instructions are only included for reference. The assembler will translate the more general form of an instruction (e.g., add) into the immediate form (e.g., addi) if the second argument is constant.
| abs Rdest, Rsrc | Absolute Value |
Put the absolute value of the integer from register Rsrc in register Rdest. | |
| add Rdest, Rsrc1, Src2 | Addition (with overflow) |
| addi Rdest, Rsrc1, Imm | Addition Immediate (with overflow) |
| addu Rdest, Rsrc1, Src2 | Addition (without overflow) |
| addiu Rdest, Rsrc1, Imm | Addition Immediate (without overflow) |
| and Rdest, Rsrc1, Src2 | AND |
| andi Rdest, Rsrc1, Imm | AND Immediate |
| div Rsrc1, Rsrc2 | Divide (with overflow) |
| divu Rsrc1, Rsrc2 | Divide (without overflow) |
Divide the contents of the two registers. Leave the quotient in register lo and the remainder in register hi. Note that if an operand is negative, the remainder is unspecified by the MIPS architecture and depends on the conventions of the machine on which SPIM is run. | |
| div Rdest, Rsrc1, Src2 | Divide (with overflow) |
| divu Rdest, Rsrc1, Src2 | Divide (without overflow) |
Put the quotient of the integers from register Rsrc1 and Src2 into register Rdest. | |
| mul Rdest, Rsrc1, Src2 | Multiply (without overflow) |
| mulo Rdest, Rsrc1, Src2 | Multiply (with overflow) |
| mulou Rdest, Rsrc1, Src2 | Unsigned Multiply (with overflow) |
Put the product of the integers from register Rsrc1 and Src2 into register Rdest. | |
| mult Rsrc1, Rsrc2 | Multiply |
| multu Rsrc1, Rsrc2 | Unsigned Multiply |
Multiply the contents of the two registers. Leave the low-order word of the product in register lo and the high-word in register hi. | |
| neg Rdest, Rsrc | Negate Value (with overflow) |
| negu Rdest, Rsrc | Negate Value (without overflow) |
Put the negative of the integer from register Rsrc into register Rdest. | |
| nor Rdest, Rsrc1, Src2 | NOR |
| not Rdest, Rsrc | NOT |
Put the bitwise logical negation of the integer from register Rsrc into register Rdest. | |
| or Rdest, Rsrc1, Src2 | OR |
| ori Rdest, Rsrc1, Imm | OR Immediate |
| rem Rdest, Rsrc1, Src2 | Remainder |
| remu Rdest, Rsrc1, Src2 | Unsigned Remainder |
Put the remainder from dividing the integer in register Rsrc1 by the integer in Src2 into register Rdest. Note that if an operand is negative, the remainder is unspecified by the MIPS architecture and depends on the conventions of the machine on which SPIM is run. | |
| rol Rdest, Rsrc1, Src2 | Rotate Left |
| ror Rdest, Rsrc1, Src2 | Rotate Right |
Rotate the contents of register Rsrc1 left (right) by the distance indicated by Src2 and put the result in register Rdest. | |
| sll Rdest, Rsrc1, Src2 | Shift Left Logical |
| sllv Rdest, Rsrc1, Rsrc2 | Shift Left Logical Variable |
| sra Rdest, Rsrc1, Src2 | Shift Right Arithmetic |
| srav Rdest, Rsrc1, Rsrc2 | Shift Right Arithmetic Variable |
| srl Rdest, Rsrc1, Src2 | Shift Right Logical |
| srlv Rdest, Rsrc1, Rsrc2 | Shift Right Logical Variable |
Shift the contents of register Rsrc1 left (right) by the distance indicated by Src2 (Rsrc2) and put the result in register Rdest. | |
| sub Rdest, Rsrc1, Src2 | Subtract (with overflow) |
| subu Rdest, Rsrc1, Src2 | Subtract (without overflow) |
Put the difference of the integers from register Rsrc1 and Src2 into register Rdest. | |
| xor Rdest, Rsrc1, Src2 | XOR |
| xori Rdest, Rsrc1, Imm | XOR Immediate |
| li Rdest, imm | Load Immediate |
Move the immediate imm into register Rdest. | |
| lui Rdest, imm | Load Upper Immediate |
Load the lower halfword of the immediate imm into the upper halfword of register Rdest. The lower bits of the register are set to 0. | |
In all instructions below, Src2 can either be a register or an immediate value (a 16 bit integer).
| seq Rdest, Rsrc1, Src2 | Set Equal |
Set register Rdest to 1 if register Rsrc1 equals Src2 and to be 0 otherwise. | |
| sge Rdest, Rsrc1, Src2 | Set Greater Than Equal |
| sgeu Rdest, Rsrc1, Src2 | Set Greater Than Equal Unsigned |
Set register Rdest to 1 if register Rsrc1 is greater than or equal to Src2 and to 0 otherwise. | |
| sgt Rdest, Rsrc1, Src2 | Set Greater Than |
| sgtu Rdest, Rsrc1, Src2 | Set Greater Than Unsigned |
| sle Rdest, Rsrc1, Src2 | Set Less Than Equal |
| sleu Rdest, Rsrc1, Src2 | Set Less Than Equal Unsigned |
Set register Rdest to 1 if register Rsrc1 is less than or equal to Src2 and to 0 otherwise. | |
| slt Rdest, Rsrc1, Src2 | Set Less Than |
| slti Rdest, Rsrc1, Imm | Set Less Than Immediate |
| sltu Rdest, Rsrc1, Src2 | Set Less Than Unsigned |
| sltiu Rdest, Rsrc1, Imm | Set Less Than Unsigned Immediate |
Set register Rdest to 1 if register Rsrc1 is less than Src2 (or Imm) and to 0 otherwise. | |
| sne Rdest, Rsrc1, Src2 | Set Not Equal |
In all instructions below, Src2 can either be a register or an immediate value (integer). Branch instructions use the PC relative addressing mode, hence have a signed 16-bit offset field; hence they can jump 2^15-1 instructions (not bytes) forward or 2^15 instructions backwards. The jump/jump and link instructions contain a 26 bit address field (a variant of the memory direct addressing mode).
| b label | Branch instruction |
| bczt label | Branch Coprocessor z True |
| bczf label | Branch Coprocessor z False |
Conditionally branch to the instruction at the label if coprocessor z's condition flag is true (false). | |
| beq Rsrc1, Src2, label | Branch on Equal |
| beqz Rsrc, label | Branch on Equal Zero |
| bge Rsrc1, Src2, label | Branch on Greater Than Equal |
| bgeu Rsrc1, Src2, label | Branch on GTE Unsigned |
| bgez Rsrc, label | Branch on Greater Than Equal Zero |
Conditionally branch to the instruction at the label if the contents of Rsrc are greater than or equal to 0. | |
| bgezal Rsrc, label | Branch on Greater Than Equal Zero And Link |
Conditionally branch to the instruction at the label if the contents of Rsrc are greater than or equal to 0. Save the address of the next instruction in register 31. | |
| bgt Rsrc1, Src2, label | Branch on Greater Than |
| bgtu Rsrc1, Src2, label | Branch on Greater Than Unsigned |
Conditionally branch to the instruction at the label if the contents of register Rsrc1 are greater than Src2. | |
| bgtz Rsrc, label | Branch on Greater Than Zero |
Conditionally branch to the instruction at the label if the contents of Rsrc are greater than 0. | |
| ble Rsrc1, Src2, label | Branch on Less Than Equal |
| bleu Rsrc1, Src2, label | Branch on LTE Unsigned |
Conditionally branch to the instruction at the label if the contents of register Rsrc1 are less than or equal to Src2. | |
| blez Rsrc, label | Branch on Less Than Equal Zero |
Conditionally branch to the instruction at the label if the contents of Rsrc are less than or equal to 0. | |
| blt Rsrc1, Src2, label | Branch on Less Than |
| bltu Rsrc1, Src2, label | Branch on Less Than Unsigned |
Conditionally branch to the instruction at the label if the contents of register Rsrc1 are less than Src2. | |
| bltz Rsrc, label | Branch on Less Than Zero |
Conditionally branch to the instruction at the label if the contents of Rsrc are less than 0. | |
| bltzal Rsrc, label | Branch on Less Than And Link |
Conditionally branch to the instruction at the label if the contents of Rsrc are less than 0. Save the address of the next instruction in register 31. | |
| bne Rsrc1, Src2, label | Branch on Not Equal |
Conditionally branch to the instruction at the label if the contents of register Rsrc1 are not equal to Src2. | |
| bnez Rsrc, label | Branch on Not Equal Zero |
Conditionally branch to the instruction at the label if the contents of Rsrc are not equal to 0. | |
| j label | Jump |
Unconditionally jump to the instruction at the label. | |
| jal label | Jump and Link |
| jalr Rsrc | Jump and Link Register |
Unconditionally jump to the instruction at the label or whose address is in register Rsrc. Save the address of the next instruction in register 31. | |
| jr Rsrc | Jump Register |
Unconditionally jump to the instruction whose address is in register Rsrc. | |
| la Rdest, address | Load Address |
Load computed address, not the contents of the location, into register Rdest. | |
| lb Rdest, address | Load Byte |
| lbu Rdest, address | Load Unsigned Byte |
Load the byte at address into register Rdest. The byte is sign-extended by the lb, but not the lbu, instruction. | |
| lh Rdest, address | Load Halfword |
| lhu Rdest, address | Load Unsigned Halfword |
Load the 16-bit quantity (halfword) at address into register Rdest. The halfword is sign-extended by the lh, but not the lhu, instruction | |
| lw Rdest, address | Load Word |
Load the 32-bit quantity (word) at address into register Rdest. | |
| lwcz CPdest, address | Load Word Coprocessor z |
Load the word at address into register CPdest of coprocessor z (0-3). | |
| sb Rsrc, address | Store Byte |
Store the low byte from register Rsrc at address. | |
| sh Rsrc, address | Store Halfword |
Store the low halfword from register Rsrc at address. | |
| sw Rsrc, address | Store Word |
S tore the word from register Rsrc at address. | |
| swcz CPsrc, address | Store Word Coprocessor z |
Store the word from register CPsrc of coprocessor z at address. | |
| move Rdest, Rsrc | Move |
Move the contents of Rsrc to Rdest. The multiply and divide unit produces its result in two additional registers, hi and lo. These instructions move values to and from these registers. The multiply, divide, and remainder instructions described above are pseudoinstructions that make it appear as if this unit operates on the general registers and detect error conditions such as divide by zero or overflow. | |
| mfhi Rdest | Move From hi |
| mflo Rdest | Move From lo |
Move the contents of the hi (lo) register to register Rdest. | |
| mthi Rdest | Move To hi |
| mtlo Rdest | Move To lo |
Move the contents register Rdest to the hi (lo) register. Coprocessors have their own register sets. These instructions move values between these registers and the CPU's registers. | |
| mfcz Rdest, CPsrc | Move From Coprocessor z |
Move the contents of coprocessor z's register CPsrc to CPU register Rdest. | |
| mtcz Rsrc, CPdest | Move To Coprocessor z |
Move the contents of CPU register Rsrc to coprocessor z's register CPdest. | |
| pushgm | Push word on stack |
| popgm | Pop word from stack |
Push and Pop a word off of the stack, assuming the stack pointer points to the next available word on the stack. | |
| rfe | Return From Exception |
Restore the Status register. | |
| syscall | System Call |
Register v0 contains the number of the system call (see <A HREF="#syscalls>System Services) provided by SPIM. | |
| break n | Break |
Cause exception n. Exception 1 is reserved for the debugger. | |
| nop | No operation |
Do nothing. | |